Michael Frank has spent his career as an academic researcher, working for more than three decades in the very special niche of computer engineering. According to Frank, the time has finally come for this special niche. “At the beginning of this year, I decided it was the right time to try to commercialize these things,” says Frank. In July 2024, he left his position as a senior engineering scientist at Sandia National Laboratories to join US-UK-based startup Vaire Computing.
Frank says the time is right to take his life’s work — called reversible computing — out of academia and into the real world as the computing industry runs out of energy. “We’re still nearing the end of scaling power efficiency for conventional chips,” says Frank. According to the IEEE Roadmap for the Semiconductor Industry report, Frank helped modify the fundamental energy efficiency of conventional digital logic later this decade, and “it’s going to require more unconventional approaches like what we’re looking at,” he says. .
As Moore’s Law stumbles and its energy-focused cousin Koomey’s Law slows down, a new paradigm may be necessary to meet the growing computing demands of today’s world. According to Frank’s research at Sandia in Albuquerque, reversible computing can offer up to a 4,000x increase in energy efficiency compared to traditional approaches.
“Moore’s Law has kind of broken down, or really slowed down,” says Erik DeBenedictis, the founder of Zettaflops, who is not related to Vaire. “Reversible computing is one of the few ways to revive Moore’s Law or get further improvements in energy efficiency.”
Vaire’s first prototype, expected to be in production in the first quarter of 2025, is less ambitious – producing a chip that for the first time ever recovers the energy used in an arithmetic circuit. Another chip expected to hit the market in 2027 will be an energy-saving processor specialized in AI inference. A 4000x improvement in energy efficiency is on Vaire’s agenda, but probably in 10 or 15 years.
“I feel like the technology has shown promise,” says Himanshu Thapliyal, an associate professor of electrical engineering and computer science at the University of Tennessee, Knoxville, who is not affiliated with Vaire. “But there are also some challenges, and hopefully Vaire Computing will be able to overcome some of them.”
What is reversible computing?
Intuitively, information may seem like an ephemeral, abstract concept. But in 1961, Rolf Landauer from IBM discovered a surprising fact: Erasing a piece of information in a computer necessarily costs energy, which is lost as heat. It occurred to Landauer that if you were to perform calculations without erasing any information, or “reversibly,” you could, at least in theory, do the calculations without consuming any energy.
Landauer himself considered the idea impractical. If you had to store every input and intermediate result of a calculation, you would quickly fill memory with unnecessary data. But Landauer’s successor, Charles Bennett of IBM, discovered a solution to this problem. Instead of just storing intermediate results in memory, you can reverse or “decompute” the calculation once that result is no longer needed. This way, only the original inputs and the final result need to be saved.
Take a simple example like an exclusive-OR or XOR gate. Normally, a gate is not reversible – there are two inputs and only one output, and knowing the output doesn’t give you complete information about what the inputs were. The same calculation can be performed reversibly by adding another output, a copy of one of the original inputs. The two outputs can then be used to recover the original inputs in the decomputation step.
A traditional exclusive-OR (XOR) gate is not reversible—you can’t recover the inputs just by knowing the output. By adding another output, a mere copy of one of the inputs, it is reversible. The two outputs can then be used to “decompress” the XOR gate and restore the inputs and thus the energy used in the calculation.
The idea continued to gain academic attention, and in the 1990s several students working under Thomas Knight at MIT embarked on a series of demonstrations of the principle of reversible computer chips. One of those students was Frank. Although these demonstrations showed that reversible computation was possible, the electrical power consumption from the outlet was not necessarily reduced: Although power was recovered in the circuit itself, it was subsequently lost to the external power supply. That’s the problem Vaire set out to solve.
Reversible calculation in CMOS
The Landauer limit gives a theoretical minimum for how much energy it costs to erase information, but there is no maximum. Today’s CMOS implementations use more than a thousand times more power to erase a bit than is theoretically possible. This is mostly because the transistors need to maintain high signal energy for reliability and in normal operation everything dissipates as heat.
To avoid this problem, many alternative physical implementations of reversible circuits have been considered, including superconducting computers, molecular machines, and even living cells. However, to make reversible computing practical, the Vaire team sticks to conventional CMOS techniques. “Reversible computing is disruptive enough,” says Vaire CTO and co-founder Hannah Earley. “We don’t want to disrupt everything else at the same time.”
In order for CMOS to play nicely with reversibility, scientists had to come up with clever ways to recover and recycle this signal energy. “It’s kind of not immediately clear how you make CMOS work reversibly,” says Earley.
The main way to reduce excess heat when using transistors – to operate them adiabatically – is to slowly ramp the control voltage instead of jumping it up or down. This can be done without adding additional computing time, Earley says, because currently the switching times of the transistors are kept fairly slow to avoid generating too much heat. So you can keep the same switching time and just change the waveform that does the switching, saving power. However, adiabatic switching requires something to generate more complex ramp waveforms.
It still takes energy to flip a bit from 0 to 1, changing the gate voltage on the transistor from its low to high state. The trick is that if you don’t convert the energy to heat, but store most of it in the transistor itself, you can recover most of that energy during the decomputation step, where any computation no longer needed is reversed. The way to recover that energy, Earley explains, is to build the entire circuit into a resonator.
A resonator is something like a swinging pendulum. If there were no friction from the pendulum’s hinge or the surrounding air, the pendulum would swing forever, rising to the same height with each swing. Here the swing of the pendulum is the rise and fall of the voltage supplying the circuit. One calculation step is performed for each ascent. On each downswing, a decommutation is performed, which restores the energy.
In any real implementation, some amount of energy is still lost with each swing, so the pendulum requires some force to keep it going. But Vaire’s approach paves the way to minimize that friction. Incorporating the circuit into the resonator simultaneously creates the more complex waveforms required for adiabatic switching of the transistors and provides a mechanism for recovering the energy saved.
A long way to commercial viability
Although the idea of embedding reversible logic in a resonator has been developed before, no one has yet built one that integrates an on-chip resonator with a computing core. Vaire’s team is hard at work on their first version of this chip. The simplest resonator to implement and the one the team tackles first is the inductive-capacitive (LC) resonator, where the entire circuit plays the role of capacitor and the on-chip inductor serves to maintain the voltage oscillation.
The chip that Vaire plans to ship to production in early 2025 will be a reversible adder built into an LC resonator. The team is also working on a chip that will perform the multiplication and accumulation operation, a fundamental calculation in most machine learning applications. In the coming years, Vaire plans to design the first reversible chip dedicated to AI inference.
“Some of our first test chips may be low-end systems, especially performance-constrained environments, but not long after that we’re also reaching out to higher-end markets,” says Frank.
LC resonators are the most direct way to implement in CMOS, but they come with fairly low quality factors, which means that the voltage swing will run with some friction. The Vaire team is also working on integrating a microelectromechanical systems (MEMS) version of the resonator, which is much more difficult to integrate on a chip but promises much higher quality factors (less friction). Earley expects the MEMS-based resonator to eventually provide 99.97% frictionless operation.
Along the way, the team designs new reversible logic gate architectures and electronic design and automation tools for reversible computations. “I think most of our challenges will be in custom fabrication and heterointegration to combine the efficient resonator circuitry together with the logic in one integrated product,” says Frank.
Earley hopes these are challenges the company will overcome. “Essentially, this allows (us) to achieve a 4,000-fold improvement in performance over the next 10 to 15 years,” he says. “It will really depend on how good a resonator you can get.
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